<?xml version="1.0" encoding="UTF-8"?><xml><records><record><source-app name="Biblio" version="7.x">Drupal-Biblio</source-app><ref-type>17</ref-type><contributors><authors><author><style face="normal" font="default" size="100%">F.Djeffal</style></author><author><style face="normal" font="default" size="100%">M.Chahdi</style></author><author><style face="normal" font="default" size="100%">A. Benhaya</style></author><author><style face="normal" font="default" size="100%">M.L.Hafiane</style></author></authors></contributors><titles><title><style face="normal" font="default" size="100%">An approach based on neural computation to simulate the nanoscale CMOS circuits: Application to the simulation of CMOS inverter</style></title><secondary-title><style face="normal" font="default" size="100%">Solid-State Electronics</style></secondary-title></titles><dates><year><style  face="normal" font="default" size="100%">2007</style></year></dates><urls><web-urls><url><style face="normal" font="default" size="100%">http://cat.inist.fr/?aModele=afficheN&amp;cpsidt=18544857</style></url></web-urls></urls><volume><style face="normal" font="default" size="100%">pp.26-34, 51 (1)</style></volume><language><style face="normal" font="default" size="100%">eng</style></language></record></records></xml>